School of Computer Science and Statistics
(Semester 1, 5 ECTS) The aim of this module is to give students a firm understanding of the theory
underlying the processing and interpretation of visual information and the ability to
apply that understanding to ubiquitous computing and entertainment related
problems.
(Semester 1, 5 ECTS) Starting with the theoretical foundations of logic, the students learn about combinatorial logic and synchronous logic, and how it can be used to construct logic functions that are useful in computing systems. The focus is on laying the groundwork for the hardware courses in the second year.
(Semester 1, 5 ECTS) The module is intended to build on the learning outcomes of an introductory
course in C programming such as the Year 1 Computer Engineering I module to give students the ability to understand and apply object oriented programming
principles to solve real problems.
(Semester 1, 5 ECTS) To study well-established computing theory, with special consideration for sorting and searching problems.
Module Code ST8004 Module Name Introduction to Experimental Design ECTS Weighting[1] 5 ECTS Semester taught Semester 1 Module Coordinator/s Prof. James Ng Module Learning Outcomes On successful completion … Read more
(Semester 1, 5 ECTS) IT and its “impact” on society; models for assessing technological “impact”; history of IT; ethics; writing, presenting and argumentation; other topics.
(Semester 1, 5 ECTS) An introduction to the basic structure and operation of a computer system, focussing on the processor (CPU), memory and the execution of programs.
Module Code STP80090 Module Name Foundations of Data Science 2 ECTS Weighting [1] 5 ECTS Semester taught Semester 1 Module Coordinator/s Prof. Simon Wilson Module Learning Outcomes Module Content Specific … Read more
(Semester 1, 5 ECTS) What is an Internet Application and how have these evolved?
(Semester 1, 5 ECTS) Advanced topics in Computer Architecture including virtual memory, cache organisation, pipelining, multiprocessor architectures and cache coherency.