| Module Code | CSU34021 |
| Module Name | Computer Architecture II |
| ECTS Weighting [1] | 5 ECTS |
| Semester Taught | Semester 1 |
| Module Coordinator/s | Andrea Patane |
Module Learning Outcomes
On successful completion of this module, students will be able to:
- Write simple IA32 and x64 assembly language functions;
- Explain the IA32 and x64 procedure calling conventions;
- Describe the RISC design philosophy and translate simple high level language programs into RISC-I assembly language;
- Explain the key concepts behind instruction level pipelining and know how to apply a number of techniques to overcome data, load and control hazards;
- Explain the advantages of using virtual memory, show how virtual addresses are mapped to physical addresses and demonstrate how the functionality of a MMU is integrated into an operating system;
- Explain the use of a memory hierarchy to reduce effective memory access times, describe the organisation and operation of a cache;
- Discuss the problems of using caches in a multiprocessor, analyse the operation of several cache coherency protocols.
Module Content
Topics covered in this module are:
- Basic IA32 and x64 assembly language;
- Procedure calling conventions (IA32 and x64);
- RISC vs CISC, RISC-1 design criteria and architecture, register windows and delayed jumps;
- Instruction level pipelining, DLX/MIPS pipeline, resolving data, load and control hazards;
- Virtual Memory, memory management units (MMUs), multi-level page tables, TLBs, integration of a MMU into an operating system;
- Cache organization (L, K and N), operation, performance, cache coherency;
- Multiprocessor architectures, cache coherency protocols (write-through, write-once, Firefly and MESI).
Teaching and Learning Methods
- In-person lectures;
- In-person tutorials in study weeks 3, 6, 9 and 12;
- Programming and problems through tutorials;
- Readings.
Assessment Details
| Assessment Component | Brief Description | Learning Outcomes Addressed | % of Total | Week Set | Week Due |
| Tutorial 1 | Intel 32-bit and64-bit assembly | LO1, LO2 | 10% | Week 6 | Week 8 |
| Tutorial 2 | Evaluate and write RISC-I assembly | LO3 | 10% | Week 10 | Week 12 |
| Tutorial 3 | Pipelining and MMU | LO4, LO5 | 10% | Week 12 | Week 14 |
| Examination | In Person 2hrs | LO1 – LO7 | 70% | N/A | N/A |
Reassessment Details
Supplemental assessment is by examination ONLY (100%). Students repeating ‘off-books’ (OBA) are also assessed by examination ONLY (100%) in all examination sessions. In person exam 2hrs
Contact Hours and Indicative Student Workload
| Contact Hours (scheduled hours per student over full module), broken down by: | 25 hours |
| Lecture | 22 hours |
| Laboratory | 0 hours |
| Tutorial or seminar | 3 hours |
| Other | 0 hours |
| Independent study (outside scheduled contact hours), broken down by: | 75 hours |
| Preparation for classes and review of material (including preparation for examination, if applicable) | 45 hours |
| Completion of assessments (including examination, if applicable) | 30 hours |
| Total Hours | 100 hours |
Recommended Reading List
- “Computer Architecture – A Quantitative Approach”, Hennessey and Patterson.
- “High Performance Computer Architecture”, Harold Stone.
- “Assembly Language for x86 Processors”, Kip Irvine.
Module Pre-requisites
Prerequisite modules: Assembly language and C/C++ programming.
Other/alternative non-module prerequisites: N/A
Module Co-requisites
N/A